| Giorgio Di Natale |  |
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Date de l'exposé : 19 septembre 2014, 11h30-12h30, salle Petri/Turing
Manufacturing Test of Secure Devices
Cryptographic algorithms are used to protect sensitive information when the communication medium is not secure. Unfortunately, the hardware implementation of these cryptographic algorithms allows secret key retrieval using different forms of attacks based on the observation of key-related information. Among these attacks, the exploitation of test infrastructures can be an effective attack. While users expect high quality product for secure applications (thus requiring high quality test) testing those devices faces a dilemma: how to test and, possibly, develop design-for-testability schemes providing high testability (high controllability/observability) while maintaining high security (no controllability/observability). This seminar will address these issues presenting the security weaknesses of classical DFT techniques, pros and cons of security-dedicated Design for Testability solutions, and impact of design for security techniques on testability.
